TWR-S12G240【PDF 60/1292 页】TOWER SYSTEM MODULE S12G240

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Device Overview MC9S12G-Family

1.8

1.8.1

1.8.1.1

Device Pinouts

S12GN16 and S12GN32

Pinout 20-Pin TSSOP

SCK0/IOC3/PS6

1

20

PS5/IOC2/MOSI0

SS0/TXD0/PWM3/ECLK/API_EXTCLK/ETRIG3/PS7

RESET

VRH/VDDXRA

VSSXA

EXTAL/RXD0/PWM0/IOC2/ETRIG0/PE0

VSS

XTAL/TXD0/PWM1/IOC3/ETRIG1/PE1

TEST

BKGD

2

3

4

5

6

7

8

9

10

S12GN16

S12GN32

20-Pin TSSOP

19

18

17

16

15

14

13

12

11

PS4/ETRIG2/PWM2/RXD0/MISO0

PAD5/KWAD5/ETRIG3/PWM3/IOC3/TXD0/AN5/ACMPM

PAD4/KWAD4/ETRIG2/PWM2/IOC2/RXD0/AN4/ACMPP

PAD3/KWAD3/AN3/ACMPO

PAD2/KWAD2/AN2

PAD1/KWAD1/AN1

PAD0/KWAD0/AN0

PT0/IOC0/XIRQ

PT1/IOC1/IRQ

Figure 1-3. 20-Pin TSSOP Pinout for S12GN16 and S12GN32

Table 1-8. 20-Pin TSSOP Pinout for S12GN16 and S12GN32

Function

Internal Pull

<----lowest-----PRIORITY-----highest---->

Power

Resistor

Package

Pin

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

Pin

PS6

PS7

RESET

VDDXRA

VSSXA

PE0 1

VSS

PE1 1

TEST

BKGD

PT1

PT0

PAD0

PAD1

PAD2

2nd

Func.

IOC3

ETRIG3

—

VRH

—

ETRIG0

—

ETRIG1

—

MODC

IOC1

IOC0

KWAD0

KWAD1

KWAD2

3rd

Func.

SCK0

API_EXTCLK

—

—

—

PWM0

—

PWM1

—

—

IRQ

XIRQ

AN0

AN1

AN2

4th

Func

—

ECLK

—

—

—

IOC2

—

IOC3

—

—

—

—

—

—

—

5th

Func

—

PWM3

—

—

—

RXD0

—

TXD0

—

—

—

—

—

—

—

6th

Func

—

TXD0

—

—

—

EXTAL

—

XTAL

—

—

—

—

—

—

—

7th

Func

—

SS0

—

—

—

—

—

—

—

—

—

—

—

—

—

8th

Func

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

Supply

V DDX

V DDX

V DDX

—

—

V DDX

—

N.A.

V DDX

V DDX

V DDX

V DDA

V DDA

V DDA

CTRL

PERS/PPSS

PERS/PPSS

PULLUP

—

—

PUCR/PDPEE

—

PUCR/PDPEE

RESET pin

Always on

PERT/PPST

PERT/PPST

PER1AD/PPS1AD

PER1AD/PPS1AD

PER1AD/PPS1AD

Reset

State

Up

Up

—

—

Down

—

Down

Down

Up

Disabled

Disabled

Disabled

Disabled

Disabled

MC9S12G Family Reference Manual, Rev.1.23

62

Freescale Semiconductor

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